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K7N401801M - (K7N401801M / K7N403601M) 128Kx36 & 256Kx18 Pipelined NtRAM-TM

Description

The K7N403601M and K7N401801M are 4,718,592 bits Synchronous Static SRAMs.

The NtRAMTM, or No Turnaround Random Access Memory utilizes all the bandwidth in any combination of operating cycles.

Features

  • 3.3V+0.165V/-0.165V Power Supply.
  • I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.
  • Byte Writable Function.
  • Enable clock and suspend operation.
  • Single READ/WRITE control pin.
  • Self-Timed Write Cycle.
  • Three Chip Enable for simple depth expansion with no data contention.
  • Α interleaved burst or a linear burst mode.
  • Asynchronous output enable control.
  • Power Down mode.

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Datasheet preview – K7N401801M

Datasheet Details

Part number K7N401801M
Manufacturer Samsung semiconductor
File Size 311.55 KB
Description (K7N401801M / K7N403601M) 128Kx36 & 256Kx18 Pipelined NtRAM-TM
Datasheet download datasheet K7N401801M Datasheet
Additional preview pages of the K7N401801M datasheet.

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K7N403601M K7N401801M www.DataSheet4U.com 128Kx36 & 256Kx18 Pipelined NtRAMTM Document Title 128Kx36 & 256Kx18-Bit Pipelined NtRAM TM Revision History Rev. No. 0.0 0.1 History 1. Initial document. 1. Changed tCD,tOE from 4.0ns to 4.2ns at -75 2. Changed DC condition at Icc and parameters ISB1 ; from 10mA to 30mA, ISB2 ; from 10mA to 30mA. Add VDDQ Supply voltage( 2.5V I/O ) Changed VOL Max value from 0.2V to 0.4V at 2.5V I/O. Final spec Release. Remove VDDQ Supply voltage( 2.5V I/O ) Add VDDQ Supply voltage( 2.5V I/O ) Draft Date July.06. 1998 Oct. 10 . 1998 Remark Preliminary Preliminary 0.2 0.3 1.0 2.0 3.0 Dec. 10. 1998 Dec. 23. 1998 Jan. 29. 1999 Feb. 25. 1999 May. 13.
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